vishay siliconix dg2535/dg2536 document number: 72939 s-71009-rev. e, 14-may-07 www.vishay.com 1 0.35- low-voltage dual spdt analog switch features ? low voltage operation ? low on-resistance - r on : 0.35 at 2.7 v ? - 69 db oirr at 2.7 v, 100 khz ? msop-10 and dfn-10 packages ? esd protection > 2000 v ? latch-up current > 300 ma (jesd 78) benefits ? reduced power consumption ? high accuracy ? reduce board space ? 1.8 v logic compatible ? high bandwidth applications ? cellular phones ? speaker headset switching ? audio and video signal routing ? pcmcia cards ? battery oper ated systems ? relay replacement description the dg2535/dg2536 is a sub 1 (0.35 at 2.7 v) dual spdt analog switches designed fo r low voltage applications. the dg2535/dg2536 has on-resist ance matching (less than 0.05 at 2.7 v) and flatness (less than 0.2 at 2.7 v) that are guaranteed over the entire volt age range. additionally, low logic thresholds make the dg2535/dg2536 an ideal interface to low voltage dsp control signals. the dg2535/dg2536 has fast switching speed with break-before-make guaranteed. in the on condition, all switching elements conduct equally in both directions. off-isolation and crosstalk is - 69 db at 100 khz. the dg2535/dg2536 is built on vishay siliconix?s high-density low voltage cmos pr ocess. an eptiaxial layer is built in to prevent latchup. the dg2535/dg2536 contains the additional benefit of 2,000 v esd protection. in space saving msop-10 and dfn-10 lead (pb)-free packages, the dg2535/dg2536 are high performance, low r on switches for battery powered applications. no lead (pb) is used in the manufacturing process either inside the device/ package or on the external terminations. as a committed partner to the community and the environment, vishay siliconix manufactures this product with the lead (pb)-free device terminations. for analog switching products manufactured in dfn packages, the lead (pb)-free "-e3/e4" suffix is being used as a designator. lead (pb)-free dfn products purchased at any time will have either a nickel-palladium-gold device termination or a 100 % matte tin device termination. the different lead (pb)-free materials are interchangeable and meet all jedec standards for reflow and msl rating. functional block diagram and pin configuration no2 com2 in2 1 2 3 10 9 top view v+ no1 com1 8 dg2535 nc2 gnd 4 5 7 in1 nc1 6 nc2 com2 in2 1 2 3 10 9 top view v+ nc1 com1 8 dg2536 no2 gnd 4 5 7 in1 no1 6 truth table logic nc1 and nc2 no1 and no2 0onoff 1offon ordering information temp range package part number - 40 to 85 c msop-10 dg2535dq-t1-e3 dg2536dq-t1-e3 dfn-10 DG2535DN-T1-E4 dg2536dn-t1-e4 rohs compliant
www.vishay.com 2 document number: 72939 s-71009-rev. e, 14-may-07 vishay siliconix dg2535/dg2536 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by inte rnal diodes. limit forward diode current to maximum curr ent ratings. b. all leads welded or soldered to pc board. c. derate 4.0 mw/c above 70 c d. derate 14.9 mw/c above 70 c. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings parameter limit unit referenced v+ to gnd - 0.3 to + 6 v in, com, nc, no a - 0.3 to (v+ + 0.3) continuous current (no, nc, com) 300 ma peak current (pulsed at 1 ms, 10 % duty cycle) 500 storage temperature (d suffix) - 65 to 150 c esd per method 3015.7 > 2 kv power dissipation (packages) b msop-10 c 320 mw dfn-10 d 1191 specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %, v in = 0.5 or 1.4 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 2.7 v, v com = 0.6 v/1.5 v, i no , i nc = 100 ma room full 0.35 0.5 0.6 r on flatness d r on flatness room 0.09 0.2 on-resistance match between channels d r ds(on) room 0.05 switch off leakage current i no(off) i nc(off) v+ = 3.3 v v no , v nc = 0.3 v/3 v, v com = 3 v/0.3 v room full - 1 - 10 1 10 na i com(off) room full - 1 - 10 1 10 channel-on leakage current i com(on) v+ = 3.3 v, v no , v nc = v com = 0.3 v/3 v room full - 1 - 10 1 10 digital control input high voltage d v inh full 1.4 v input low voltage v inl full 0.5 input capacitance c in full 10 pf input current i inl or i inh v in = 0 or v+ full 1 1 a
document number: 72939 s-71009-rev. e, 14-may-07 www.vishay.com 3 vishay siliconix dg2535/dg2536 notes: a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. guarantee by design, nor subjected to production test. e. v in = input voltage to perform proper function. specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %, v in = 0.4 or 2.0 v e temp a limits - 40 to 85 c unit min b typ c max b dynamic characteristics tu r n - o n t i m e t on v no or v nc = 2.0 v, r l = 50 , c l = 35 pf room full 52 82 90 ns turn-off time t off room full 43 73 78 break-before-make time t d full 1 6 charge injection d q inj c l = 1 nf, v gen = 1.5 v, r gen = 0 room 21 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 100 khz room - 69 db crosstalk d x ta l k room - 69 n o , n c off capacitance d c no(off) v in = 0 or v+, f = 1 mhz room 145 pf c nc(off) room 145 channel-on capacitance d c no(on) v in = 0 or v+, f = 1 mhz room 406 c nc(on room 406 power supply power supply current i+ v in = 0 or v+ full 1.0 a
www.vishay.com 4 document number: 72939 s-71009-rev. e, 14-may-07 vishay siliconix dg2535/dg2536 typical characteristics 25 c, unless otherwise noted r on vs. v com and supply voltage supply current vs. temperature leakage current vs. temperature 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v com - analog voltage (v) t = 25 c i a = 100 ma - on-resistance ( ) r on v+ = 1.8 v v+ = 2.0 v v+ = 2.7 v v+ = 3.0 v v+ = 3.3 v 10 10000 100000 temperature ( c) 100 1000 i+ - supply current (na) v+ = 3.0 v v in = 0 v - 60 - 40 - 20 0 20 40 60 80 100 1 10000 temperature ( c) v+ = 3.0 v 100 1000 leakage current (pa) i com(on) i no(off) , i nc(off) 10 i om(off) c r on vs. analog voltage and temperature (nc1) supply current vs. input switching frequency leakage vs. analog voltage 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v com - analog voltage (v) - on-resistance ( ) r on v+ = 3.0 v i s = 100 ma 85 c 25 c - 40 c 10 10 k 100 k 10 m 100 1 k 1 m 100 ma 10 ma 1 ma 100 a 10 a 1 a 100 na 1 na input switching frequency (hz) i+ - supply current (a) v+ = 3 v 10 na - 300 - 250 - 200 - 150 - 100 -50 0 50 100 150 200 250 300 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v com - analog voltage (v) leakage current (pa) v+ = 3.0 v i com(on) i com(off) i no(off) , i nc(off)
document number: 72939 s-71009-rev. e, 14-may-07 www.vishay.com 5 vishay siliconix dg2535/dg2536 typical characteristics 25 c, unless otherwise noted test circuits switching time vs. temperature switching threshold vs. supply voltage 0 10 20 30 40 50 60 70 80 100 90 - 60 - 40 - 20 0 20 40 60 80 100 / t on - switching t ime (ns) t off t on v+ = 3 v t off v+ = 3 v temperature ( c) t on v+ = 2 v t off v+ = 2 v 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 0123456 v+ - supply voltage (v) - switching threshold (v) v t insertion loss, off-isolation crosstalk vs. frequency charge injection vs. analog voltage 100 k -90 10 m 10 -70 -50 100 m 1 g 1 m frequency (hz) (db) loss, oirr, x talk -30 -10 oirr x ta l k v+ = 3.0 v r l = 50 loss - 300 - 250 - 200 - 150 - 100 -50 0 50 100 150 200 250 300 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v com - analog voltage (v) q - charge injection (pc) v+ = 3.0 v v+ = 2.0 v figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 v out gnd v+ 50 % 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. 0 v switch output v out =v com r l r l +r on 0.9 x v out t r < 5 ns t f < 5 ns v inh v inl
www.vishay.com 6 document number: 72939 s-71009-rev. e, 14-may-07 vishay siliconix dg2535/dg2536 test circuits vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon tech- nology and package reliability represent a com posite of all qualified locations. for related documents such as package/tape dra wings, part marking, and reliability data, see http://www.vishay.com/ppg?72939 . figure 2. break-before-make interval c l (includes fixture and stray capacitance) nc v no no v nc 0 v logic input switch output v o v nc = v no 90 % t d in com v+ gnd v+ c l 35 pf v o r l 300 v inl v inh t r < 5 ns t f < 5 ns t d figure 3. charge injection c l = 1 nf r gen v out com v in = 0 - v+ in gnd v+ v+ + nc or no off on on in v out v out q = v out x c l in depends on switch configuration: input polarity determined by sense of switch. figure 4. off-isolation in gnd nc or no 0 v, 2.4 v 10 nf com off isolation = 20 log v com v no/ nc r l analyzer v+ v+ com figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.
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